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Altera

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Company Profile
Altera Corporation (NASDAQ: ALTR) is the world's pioneer in
system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide.

More information is available at www.altera.com

Device	General Description	Unique Features
	Lowest-cost, single-chip, easy-to-use CPLD family Overview Design Utilities Features Literature	Lowest CPLD cost & power consumption Highest CPLD density & performance Instant-on, non-volatile User flash memory 1.8-V, 2.5-V & 3.3-V supply voltages
	Low-cost CPLD for lower-complexity, low-density designs Overview Design Utilities Features Literature	Low to moderate density Instant-on, non-volatile 5-V I/O support 2.5-V, 3.3-V or 5.0-V supply voltages

	Second-generation, lowest-cost Cyclone^™ FPGA family for designs where cost concerns outweigh the need for performance or extensive features Overview Design Utilities Features Literature	Nios^® embedded processor support Embedded 18x18 digital signal processing (DSP) multipliers Moderate on-chip memory Moderate-speed I/O & memory interfaces Broad intellectual property (IP) portfolio support
	First-generation, lower-density, low-cost Cyclone FPGA family Overview Design Utilities Features Literature	Nios embedded processor support Low to moderate on-chip memory Low to moderate-speed I/O & memory interfaces Broad IP portfolio support

	General-purpose FPGA family with the largest density & fastest performance Overview Design Utilities Features Literature	Nios embedded processor support The most DSP blocks Large on-chip memory High-speed I/O & memory interfaces 1-Gbps dynamic phase alignment (DPA) with source-synchronous signaling Broad IP portfolio support
	General-purpose, high-performance FPGA family Overview Design Utilities Features Literature	Nios embedded processor support DSP blocks Large on-chip memory High-speed I/O & memory interfaces Broad IP portfolio support
	Stratix^™ architecture with high-speed signaling support Overview Design Utilities Features Literature	All Stratix features 3.125-Gbps transceivers 1-Gbps DPA Receiver equalization & transmitter pre-emphasis Broad IP portfolio support

	Low-cost, structured ASIC solution Overview Design Utilities Features Literature	All Stratix features Comparable device costs to ASICs Seamless migration of FPGA-proven designs Unified design tools (FPGA/ASIC) Fast turnaround times ~40% lower power vs. FPGA ~50% higher performance vs. FPGA Broad IP portfolio support
Design Software	General Description	Unique Features
	The most advanced design software for CPLDs, FPGAs, and structured ASICs Quartus II homepage Download Quartus II Web Edition Software Literature	Leadership in Performance Leadership in Design Flow Methodology Support Leadership in System Design & IP Integration Technology Leadership in Place-and-Route Technology Leadership in Timing Closure Methodologies Leadership in Verification Solutions
Soft-Core Embedded Processor	General Description	Unique Features
	Ease-of-use and flexibility has helped it become one of the world's most popular embedded processors Overview Processor Cores Features Literature	Boost System Performance Lower System Cost Manage Product Life Cycle Design with Robust, Easy-to-Use Tools Use Full-Featured Development Kit